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HF-PCA9685 0.1.0-dev
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This guide covers all configuration options available for the PCA9685 driver.
The PCA9685 I2C address is configured via hardware pins A0-A5. Each pin represents one bit of the 6-bit address field.
| Pin | Address Bit | Description |
|---|---|---|
| A0 | Bit 0 | Least significant address bit |
| A1 | Bit 1 | |
| A2 | Bit 2 | |
| A3 | Bit 3 | |
| A4 | Bit 4 | |
| A5 | Bit 5 | Most significant address bit |
Default I2C address: 0x40 (all address pins to GND)
Address Range: 0x40 to 0x7F (7-bit I2C addresses)
Example: To set address 0x41, connect A0 to VDD and A1-A5 to GND.
Use the SetPwmFreq() method to configure the PWM frequency:
Valid Range: 24 Hz to 1526 Hz (typical)
Location: src/pca9685.ipp (template implementation)
The driver automatically calculates the prescale value using the formula:
Where:
25,000,000 is the internal oscillator frequency (25 MHz)4096 is the PWM resolution (12 bits)freq_hz is the desired frequencyImplementation: src/pca9685.ipp (calcPrescale)
| Application | Frequency | Prescale (approx) |
|---|---|---|
| Servos | 50 Hz | 121 |
| LEDs (smooth dimming) | 1000 Hz | 5 |
| Motors | 100-500 Hz | 11-61 |
Set PWM for a single channel:
Channel Range: 0-15 (16 channels total)
PWM Value Range: 0-4095 (12-bit resolution)
Set all channels simultaneously:
Use Case: Synchronized control of all outputs
The driver abstracts register access, but understanding the register map helps with advanced usage:
| Register | Address | Purpose |
|---|---|---|
MODE1 | 0x00 | Main configuration (reset, sleep, auto-increment) |
MODE2 | 0x01 | Output configuration (open-drain, totem-pole, inversion) |
SUBADR1-3 | 0x02-0x04 | Subaddress registers |
ALLCALLADR | 0x05 | All-call I2C address |
LED0_ON_L | 0x06 | Channel 0 ON time (low byte) |
LED0_ON_H | 0x07 | Channel 0 ON time (high byte) |
LED0_OFF_L | 0x08 | Channel 0 OFF time (low byte) |
LED0_OFF_H | 0x09 | Channel 0 OFF time (high byte) |
| ... | ... | Channels 1-15 follow sequentially |
ALL_LED_ON_L | 0xFA | All channels ON time (low byte) |
ALL_LED_ON_H | 0xFB | All channels ON time (high byte) |
ALL_LED_OFF_L | 0xFC | All channels OFF time (low byte) |
ALL_LED_OFF_H | 0xFD | All channels OFF time (high byte) |
PRE_SCALE | 0xFE | PWM frequency prescaler |
TESTMODE | 0xFF | Test mode register |
Register Definitions: inc/pca9685.hpp (enum Register)
The OE pin provides hardware control over all outputs:
Note: The driver does not control the OE pin. You must handle it externally via GPIO if needed.
The chip supports sleep mode for power saving. The driver handles sleep mode automatically when changing frequency (see SetPwmFreq() implementation).
The chip supports auto-increment for efficient register access. The driver uses this feature internally for multi-byte writes.
Reset() to put device in known stateSetPwmFreq() before setting channelsSetPwm() or SetDuty() to control outputsExample: