TLE92466ED Driver 0.1.0-dev
Modern C++20 driver for Infineon TLE92466ED Six-Channel Low-Side Solenoid Driver
Loading...
Searching...
No Matches
Esp32Tle92466edSpiBus::SPIConfig Struct Reference

SPI configuration structure for ESP32. More...

#include <esp32_tle92466ed_bus.hpp>

Public Attributes

spi_host_device_t host = SPI2_HOST
 SPI host (SPI2_HOST for ESP32-C6)
 
int16_t miso_pin = 2
 MISO pin (GPIO2, -1 = not configured)
 
int16_t mosi_pin = 7
 MOSI pin (GPIO7, -1 = not configured)
 
int16_t sclk_pin = 6
 SCLK pin (GPIO6, -1 = not configured)
 
int16_t cs_pin = 10
 CS pin (GPIO10, -1 = not configured)
 
int16_t resn_pin = -1
 RESN pin (active low, -1 = not configured)
 
int16_t en_pin = -1
 EN pin (active high, -1 = not configured)
 
int16_t faultn_pin = -1
 FAULTN pin (active low, -1 = not configured)
 
int16_t drv0_pin = -1
 DRV0 pin (external drive control, -1 = not configured)
 
int16_t drv1_pin = -1
 DRV1 pin (external drive control, -1 = not configured)
 
uint32_t frequency = 1000000
 SPI frequency (1MHz)
 
uint8_t mode = 1
 SPI mode (1 = CPOL=0, CPHA=1)
 
uint8_t queue_size = 1
 Transaction queue size.
 
uint8_t cs_ena_pretrans = 1
 CS asserted N clock cycles before transaction.
 
uint8_t cs_ena_posttrans = 1
 CS held N clock cycles after transaction.
 

Detailed Description

SPI configuration structure for ESP32.

Member Data Documentation

◆ cs_ena_posttrans

uint8_t Esp32Tle92466edSpiBus::SPIConfig::cs_ena_posttrans = 1

CS held N clock cycles after transaction.

◆ cs_ena_pretrans

uint8_t Esp32Tle92466edSpiBus::SPIConfig::cs_ena_pretrans = 1

CS asserted N clock cycles before transaction.

◆ cs_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::cs_pin = 10

CS pin (GPIO10, -1 = not configured)

◆ drv0_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::drv0_pin = -1

DRV0 pin (external drive control, -1 = not configured)

◆ drv1_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::drv1_pin = -1

DRV1 pin (external drive control, -1 = not configured)

◆ en_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::en_pin = -1

EN pin (active high, -1 = not configured)

◆ faultn_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::faultn_pin = -1

FAULTN pin (active low, -1 = not configured)

◆ frequency

uint32_t Esp32Tle92466edSpiBus::SPIConfig::frequency = 1000000

SPI frequency (1MHz)

◆ host

spi_host_device_t Esp32Tle92466edSpiBus::SPIConfig::host = SPI2_HOST

SPI host (SPI2_HOST for ESP32-C6)

◆ miso_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::miso_pin = 2

MISO pin (GPIO2, -1 = not configured)

◆ mode

uint8_t Esp32Tle92466edSpiBus::SPIConfig::mode = 1

SPI mode (1 = CPOL=0, CPHA=1)

◆ mosi_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::mosi_pin = 7

MOSI pin (GPIO7, -1 = not configured)

◆ queue_size

uint8_t Esp32Tle92466edSpiBus::SPIConfig::queue_size = 1

Transaction queue size.

◆ resn_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::resn_pin = -1

RESN pin (active low, -1 = not configured)

◆ sclk_pin

int16_t Esp32Tle92466edSpiBus::SPIConfig::sclk_pin = 6

SCLK pin (GPIO6, -1 = not configured)


The documentation for this struct was generated from the following file: