tmc9660::register_mode::RAMDebug Namespace Reference

RAMDebug system namespace for TMC9660. More...

Enumerations
enum class	RamDebugSub : uint8_t {   Init = 0 , SetSampleCount = 1 , SetPrescaler = 3 , SetChannel = 4 ,   SetTriggerChannel = 5 , SetTriggerMaskShift = 6 , TriggerStart = 7 , GetState = 8 ,   ReadSample = 9 , GetInfo = 10 , GetChannelType = 11 , GetChannelAddress = 12 ,   SetPreTriggerCount = 13 , GetPreTriggerCount = 14 }
	RAMDebug subcommands. More...
enum class	InfoSelect : uint8_t {   MaxChannels = 0 , MaxSamples = 1 , FrequencyHz = 2 , CapturedSamples = 3 ,   PrescalerOnTrigger = 4 }
	RAMDebug info selections (for subcommand GetInfo) More...
enum class	RamDebugState : uint8_t {   Idle = 0 , Trigger = 1 , Capture = 2 , Complete = 3 ,   PreTrigger = 4 }
	RAMDebug states (returned by GetState) More...
enum class	TriggerType : uint8_t {   NoTrigger = 0 , RisingEdgeS = 1 , FallingEdgeS = 2 , AnyEdgeS = 3 ,   RisingEdgeU = 4 , FallingEdgeU = 5 , AnyEdgeU = 6 }
	Trigger types (for TriggerStart) More...

Functions
static uint16_t	ramDebugOffset (RamDebugSub sub, uint8_t index=0)
	Construct RAMDebug register offset from subcommand and index parameters.

Variables
static constexpr uint8_t	RAMDEBUG_BLOCK = 31
	Block number identifier for RAMDebug operations via SPI interface.
static constexpr uint8_t	RAMDEBUG_UART_CMD = 142
	UART command number for RAMDebug operations via UART interface.

Detailed Description

RAMDebug system namespace for TMC9660.

This namespace contains all RAMDebug-related definitions, commands, and utilities for real-time data capture and debugging of the TMC9660 motor control system. The RAMDebug feature allows capturing internal register values and signals for analysis and debugging purposes.

Enumeration Type Documentation

InfoSelect

enum class tmc9660::register_mode::RAMDebug::InfoSelect : uint8_t

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RAMDebug info selections (for subcommand GetInfo)

RAMDebug information selection options for retrieving system capabilities.

These options specify what type of information to retrieve when using the GetInfo subcommand. Each option returns different system parameters such as maximum supported channels, sample counts, operating frequency, and current capture status.

Enumerator
MaxChannels	Maximum number of channels supported.
MaxSamples	Maximum number of samples supported.
FrequencyHz	RAMDebug frequency in Hz.
CapturedSamples	Number of samples already captured.
PrescalerOnTrigger	Prescaler value at the trigger event.

RamDebugState

enum class tmc9660::register_mode::RAMDebug::RamDebugState : uint8_t

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RAMDebug states (returned by GetState)

RAMDebug system states indicating current operational mode.

The RAMDebug system operates in different states depending on the current activity. These states are returned by the GetState subcommand and indicate whether the system is idle, waiting for triggers, actively capturing data, or has completed a capture operation.

Enumerator
Idle	RAMDebug is not running and can be configured.
Trigger	Waiting for the trigger event.
Capture	Capturing samples after the trigger.
Complete	Capture is complete, samples can be downloaded.
PreTrigger	Capturing pretrigger samples.

RamDebugSub

enum class tmc9660::register_mode::RAMDebug::RamDebugSub : uint8_t

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RAMDebug subcommands.

RAMDebug subcommands for configuring and operating the debug system.

These subcommands control the RAMDebug feature which allows capturing real-time data from internal registers and signals. The system supports configurable trigger conditions, multiple capture channels, and flexible sample timing for debugging motor control algorithms and system behavior.

Each subcommand performs a specific operation such as initialization, configuration, triggering, or data retrieval from the debug system.

Enumerator
Init	Initialize and reset RAMDebug.
SetSampleCount	Set the total number of samples to collect.
SetPrescaler	Set the prescaler (divider = value + 1).
SetChannel	Configure a capture channel.
SetTriggerChannel	Configure the trigger channel.
SetTriggerMaskShift	Set mask and shift before trigger evaluation.
TriggerStart	Set trigger type and start measurement.
GetState	Read the current RAMDebug state.
ReadSample	Read a captured sample by index.
GetInfo	Read general RAMDebug information.
GetChannelType	Read the configured channel type.
GetChannelAddress	Read the configured channel address.
SetPreTriggerCount	Set the total number of pretrigger samples.
GetPreTriggerCount	Read the total number of pretrigger samples.

TriggerType

enum class tmc9660::register_mode::RAMDebug::TriggerType : uint8_t

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Trigger types (for TriggerStart)

Trigger types for initiating RAMDebug capture operations.

Defines the various trigger conditions that can start a data capture sequence. Triggers can be based on rising edges, falling edges, or any edge detection, with support for both signed and unsigned data interpretation depending on the signal characteristics.

Enumerator
NoTrigger	No trigger.
RisingEdgeS	Trigger on signed rising edge.
FallingEdgeS	Trigger on signed falling edge.
AnyEdgeS	Trigger on any signed edge.
RisingEdgeU	Trigger on unsigned rising edge.
FallingEdgeU	Trigger on unsigned falling edge.
AnyEdgeU	Trigger on any unsigned edge.

Function Documentation

ramDebugOffset()

static uint16_t tmc9660::register_mode::RAMDebug::ramDebugOffset ( RamDebugSub sub, uint8_t index = 0 )

inlinestatic

Construct RAMDebug register offset from subcommand and index parameters.

The RAMDebug system uses a composite addressing scheme where register offsets are constructed by combining a subcommand (upper 4 bits) with an index parameter (lower 6 bits). This allows a single register block to handle multiple operations and parameters efficiently.

Parameters

sub	Subcommand specifying the operation type
index	Index or parameter value (0-63, masked to 6 bits)

Returns

10-bit register offset for RAMDebug operations

Variable Documentation

RAMDEBUG_BLOCK

constexpr uint8_t tmc9660::register_mode::RAMDebug::RAMDEBUG_BLOCK = 31

staticconstexpr

Block number identifier for RAMDebug operations via SPI interface.

Used when accessing RAMDebug registers through the SPI interface. All RAMDebug operations target block 31 in the SPI register map.

RAMDEBUG_UART_CMD

constexpr uint8_t tmc9660::register_mode::RAMDebug::RAMDEBUG_UART_CMD = 142

staticconstexpr

UART command number for RAMDebug operations via UART interface.

Used when accessing RAMDebug registers through the UART interface. Command 142 provides access to the RAMDebug functionality over UART.