End-to-end MAX22200 health-check on real hardware. More...

#include <cinttypes>
#include <cstdio>
#include <memory>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_log.h"
#include "driver/gpio.h"
#include "esp32_max22200_bus.hpp"
#include "esp32_max22200_test_config.hpp"
#include "max22200.hpp"
#include "max22200_registers.hpp"
#include "max22200_types.hpp"

Include dependency graph for max22200_diagnostic.cpp:

Macros
#define	ESP32_MAX22200_ENABLE_DETAILED_SPI_LOGGING 1

#define	ESP32_MAX22200_ENABLE_VERBOSE_BUS_LOGGING 1

Functions
void	app_main ()

Detailed Description

End-to-end MAX22200 health-check on real hardware.

Fault-isolation tool — NOT a feature test. Walks every comm path the datasheet defines (Figures 7, 10, 11, 12, 13) and dumps the raw register bytes so they can be correlated against scope/DMM measurements at the chip pins. Use this when:

The chip refuses to leave low-power mode (ACTIVE=0, UVM=1)
nFAULT asserts unexpectedly
SPI round-trip writes don't match expected bytes
You suspect a hardware-level issue (VL bypass cap, VM rail, carrier-board grounding) and need a synchronised log / scope capture to localize it

The test sequence (each step prints raw HEX so it's unambiguous):

0 Pin-level snapshot of ENABLE / CMD / TRIGA/B / FAULT / CS / MISO BEFORE any bus init — shows the chip's idle state at MCU boot.

0.5 Hard ENABLE pulse: drive ENABLE LOW for 50 ms before bus init. Per datasheet, ENABLE LOW puts the chip in low-power mode (register state preserved). Useful as a known-clean starting condition.

1 Bus + driver construction (does NOT init the chip yet).

2 driver.Initialize() — drives ENABLE HIGH, runs the datasheet init flow (read STATUS to clear UVM, write ACTIVE=1, verify), then dumps pin levels again.

3 Three consecutive raw STATUS reads — confirms the value is stable (chip's state machine is healthy).

4 CFG_CH0 round-trip (write 0x28500600, read back, compare): the canonical SPI sanity check. Confirms cmd-byte format, byte order, CMD pin sequencing, and CS timing are correct.

5 FAULT register read — clears OCP / HHF / OLF / DPM bits per datasheet (Figure 8 / standard clear-on-read).

6 STATUS read after FAULT clear — confirms nFAULT releases.

7 Two ACTIVE=1 write variants (0x00000001 and 0x00040001) and a second CFG_CH0 round-trip after wake-up to confirm both STATUS and CFG_CHx writes land.

8 Continuous STATUS + FAULT dump @ 5 Hz forever, with a periodic re-write of ACTIVE=1 every 2 s. Lets the bench operator probe VM / VL / ENABLE / CMD / nFAULT in real time.

Build / flash: ./scripts/build_app.sh max22200_diagnostic Debug ./scripts/flash_app.sh flash_monitor max22200_diagnostic Debug

Expected healthy output

Step 2: Initialize() → OK (initialized_=1)
Step 3: STATUS reads stable across all three samples
Step 4: Read CFG_CH0 = 0x28500600 ✅ ROUND-TRIP MATCH
Step 7: every write reads back exactly what was written
Step 8: STATUS = 0x00000001 (ACTIVE=1 only) most of the time, FAULT cleanly cleared, nFAULT released

Any deviation from the above points at a hardware issue — see docs/troubleshooting.md for the recovery procedure.

Author: HardFOC

Date: 2026

Macro Definition Documentation

◆ ESP32_MAX22200_ENABLE_DETAILED_SPI_LOGGING

#define ESP32_MAX22200_ENABLE_DETAILED_SPI_LOGGING 1

◆ ESP32_MAX22200_ENABLE_VERBOSE_BUS_LOGGING

#define ESP32_MAX22200_ENABLE_VERBOSE_BUS_LOGGING 1

Function Documentation

◆ app_main()

void app_main ( void )