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TLE92466ED Driver 0.1.0-preview
Modern C++23 driver for Infineon TLE92466ED Six-Channel Low-Side Solenoid Driver
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Register definitions and bit field mappings for TLE92466ED IC. More...
#include <cstdint>Go to the source code of this file.
Classes | |
| union | TLE92466ED::SPIFrame |
| 32-bit SPI frame structure for TLE92466ED communication More... | |
Namespaces | |
| namespace | TLE92466ED |
| namespace | TLE92466ED::CentralReg |
| Central and global register addresses. | |
| namespace | TLE92466ED::DeviceID |
| Device identification and version information. | |
| namespace | TLE92466ED::ChannelBase |
| Per-channel register base addresses. | |
| namespace | TLE92466ED::ChannelReg |
| Per-channel register offsets (add to channel base address) | |
| namespace | TLE92466ED::CH_CTRL |
| CH_CTRL register bit definitions. | |
| namespace | TLE92466ED::GLOBAL_CONFIG |
| GLOBAL_CONFIG register bit definitions. | |
| namespace | TLE92466ED::GLOBAL_DIAG0 |
| GLOBAL_DIAG0 register bit definitions. | |
| namespace | TLE92466ED::GLOBAL_DIAG1 |
| GLOBAL_DIAG1 register bit definitions. | |
| namespace | TLE92466ED::GLOBAL_DIAG2 |
| GLOBAL_DIAG2 register bit definitions. | |
| namespace | TLE92466ED::FB_STAT |
| FB_STAT register bit definitions. | |
| namespace | TLE92466ED::SETPOINT |
| SETPOINT register bit definitions (per channel) | |
| namespace | TLE92466ED::CH_CTRL_REG |
| Channel CTRL register bit definitions. | |
| namespace | TLE92466ED::CH_CONFIG |
| CH_CONFIG register bit definitions. | |
| namespace | TLE92466ED::CH_MODE |
| Channel MODE register bit definitions. | |
| namespace | TLE92466ED::DITHER_CTRL |
| DITHER_CTRL register bit definitions. | |
| namespace | TLE92466ED::DITHER_STEP |
| DITHER_STEP register bit definitions. | |
Functions | |
| constexpr bool | TLE92466ED::DeviceID::is_valid_device (uint16_t icvid) noexcept |
| Check if ICVID value is valid for TLE92466ED. | |
| constexpr uint8_t | TLE92466ED::DeviceID::get_device_type (uint16_t icvid) noexcept |
| Extract device type from ICVID. | |
| constexpr uint8_t | TLE92466ED::DeviceID::get_revision (uint16_t icvid) noexcept |
| Extract silicon revision from ICVID. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::channel_mask (uint8_t channel) noexcept |
| Get channel enable bit mask. | |
| constexpr uint16_t | TLE92466ED::SETPOINT::calculate_target (uint16_t current_ma, bool parallel_mode=false) noexcept |
| Calculate setpoint value for desired current. | |
| constexpr uint16_t | TLE92466ED::SETPOINT::calculate_current (uint16_t target, bool parallel_mode=false) noexcept |
| Calculate current from setpoint value. | |
| constexpr uint16_t | TLE92466ED::get_channel_base (Channel channel) noexcept |
| Get channel base address. | |
| constexpr uint16_t | TLE92466ED::get_channel_register (Channel channel, uint16_t offset) noexcept |
| Get channel register address. | |
| constexpr uint8_t | TLE92466ED::to_index (Channel ch) noexcept |
| Convert channel to index. | |
| constexpr bool | TLE92466ED::is_valid_channel (Channel ch) noexcept |
| Validate channel number. | |
| constexpr uint8_t | TLE92466ED::calculate_crc8_j1850 (const uint8_t *data, size_t length) noexcept |
| Calculate SAE J1850 CRC-8. | |
| uint8_t | TLE92466ED::calculate_frame_crc (const SPIFrame &frame) noexcept |
| Calculate CRC for SPI frame. | |
| bool | TLE92466ED::verify_frame_crc (const SPIFrame &frame) noexcept |
| Verify CRC in received frame. | |
Variables | |
| constexpr uint16_t | TLE92466ED::CentralReg::CH_CTRL = 0x0000 |
| Channel Control Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::GLOBAL_CONFIG = 0x0002 |
| Global Configuration Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::GLOBAL_DIAG0 = 0x0003 |
| Global Diagnosis Register 0. | |
| constexpr uint16_t | TLE92466ED::CentralReg::GLOBAL_DIAG1 = 0x0004 |
| Global Diagnosis Register 1. | |
| constexpr uint16_t | TLE92466ED::CentralReg::GLOBAL_DIAG2 = 0x0005 |
| Global Diagnosis Register 2. | |
| constexpr uint16_t | TLE92466ED::CentralReg::VBAT_TH = 0x0006 |
| VBAT Threshold Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FB_FRZ = 0x0007 |
| Feedback Freeze Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FB_UPD = 0x0008 |
| Feedback Update Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::WD_RELOAD = 0x0009 |
| SPI Watchdog Reload Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_ERR_CHGR0 = 0x000A |
| Diagnosis Error CH Group 0. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_ERR_CHGR1 = 0x000B |
| Diagnosis Error CH Group 1. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_ERR_CHGR2 = 0x000C |
| Diagnosis Error CH Group 2. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_ERR_CHGR3 = 0x000D |
| Diagnosis Error CH Group 3. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_ERR_CHGR4 = 0x000E |
| Diagnosis Error CH Group 4. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_ERR_CHGR5 = 0x000F |
| Diagnosis Error CH Group 5. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_WARN_CHGR0 = 0x0010 |
| Diagnosis Warning CH Group 0. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_WARN_CHGR1 = 0x0011 |
| Diagnosis Warning CH Group 1. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_WARN_CHGR2 = 0x0012 |
| Diagnosis Warning CH Group 2. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_WARN_CHGR3 = 0x0013 |
| Diagnosis Warning CH Group 3. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_WARN_CHGR4 = 0x0014 |
| Diagnosis Warning CH Group 4. | |
| constexpr uint16_t | TLE92466ED::CentralReg::DIAG_WARN_CHGR5 = 0x0015 |
| Diagnosis Warning CH Group 5. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FAULT_MASK0 = 0x0016 |
| Fault Mask Register 0. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FAULT_MASK1 = 0x0017 |
| Fault Mask Register 1. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FAULT_MASK2 = 0x0018 |
| Fault Mask Register 2. | |
| constexpr uint16_t | TLE92466ED::CentralReg::CLK_DIV = 0x0019 |
| Clock Control Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::SFF_BIST = 0x003F |
| BIST Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::ICVID = 0x0200 |
| IC Version and ID. | |
| constexpr uint16_t | TLE92466ED::CentralReg::PIN_STAT = 0x0201 |
| Pin Status Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FB_STAT = 0x0202 |
| Feedback Status Register. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FB_VOLTAGE1 = 0x0203 |
| Feedback Voltage Register 1. | |
| constexpr uint16_t | TLE92466ED::CentralReg::FB_VOLTAGE2 = 0x0204 |
| Feedback Voltage Register 2. | |
| constexpr uint16_t | TLE92466ED::CentralReg::CHIPID0 = 0x0205 |
| Unique Chip ID Register 0. | |
| constexpr uint16_t | TLE92466ED::CentralReg::CHIPID1 = 0x0206 |
| Unique Chip ID Register 1. | |
| constexpr uint16_t | TLE92466ED::CentralReg::CHIPID2 = 0x0207 |
| Unique Chip ID Register 2. | |
| constexpr uint16_t | TLE92466ED::DeviceID::DEVICE_TYPE_MASK = 0xFF00 |
| Device type mask [15:8]. | |
| constexpr uint16_t | TLE92466ED::DeviceID::REVISION_MASK = 0x00FF |
| Silicon revision mask [7:0]. | |
| constexpr uint8_t | TLE92466ED::DeviceID::EXPECTED_TYPE_92466ED = 0x92 |
| Expected device type code. | |
| constexpr uint8_t | TLE92466ED::DeviceID::MIN_REVISION = 0x00 |
| Minimum silicon revision. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::CH0 = 0x0100 |
| Channel 0 base address. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::CH1 = 0x0120 |
| Channel 1 base address. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::CH2 = 0x0140 |
| Channel 2 base address. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::CH3 = 0x0160 |
| Channel 3 base address. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::CH4 = 0x0180 |
| Channel 4 base address. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::CH5 = 0x01A0 |
| Channel 5 base address. | |
| constexpr uint16_t | TLE92466ED::ChannelBase::SPACING = 0x0020 |
| Address spacing between channels. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::SETPOINT = 0x0000 |
| Current Setpoint Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::CTRL = 0x0001 |
| Control Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::PERIOD = 0x0002 |
| ICC PWM Frequency Controller. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::INTEGRATOR_LIMIT = 0x0003 |
| ICC Integrator Limitation. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::DITHER_CLK_DIV = 0x0004 |
| Dither Clock Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::DITHER_STEP = 0x0005 |
| Dither Step Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::DITHER_CTRL = 0x0006 |
| Dither Control Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::CH_CONFIG = 0x0007 |
| Channel Configuration. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::MODE = 0x000C |
| Channel Mode Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::TON = 0x000D |
| On-Time Register. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::CTRL_INT_THRESH = 0x000E |
| ICC Integrator Threshold. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::FB_DC = 0x0200 |
| Feedback Duty Cycle. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::FB_VBAT = 0x0201 |
| Feedback Average VBAT. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::FB_I_AVG = 0x0202 |
| Feedback Average Current. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::FB_IMIN_IMAX = 0x0203 |
| Feedback Min/Max Current. | |
| constexpr uint16_t | TLE92466ED::ChannelReg::FB_INT_THRESH = 0x0205 |
| Feedback Integrator Threshold. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::EN_CH0 = (1 << 0) |
| Enable Channel 0. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::EN_CH1 = (1 << 1) |
| Enable Channel 1. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::EN_CH2 = (1 << 2) |
| Enable Channel 2. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::EN_CH3 = (1 << 3) |
| Enable Channel 3. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::EN_CH4 = (1 << 4) |
| Enable Channel 4. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::EN_CH5 = (1 << 5) |
| Enable Channel 5. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::CH_PAR_4_5 = (1 << 12) |
| Parallel CH4/CH5. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::CH_PAR_0_3 = (1 << 13) |
| Parallel CH0/CH3. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::CH_PAR_1_2 = (1 << 14) |
| Parallel CH1/CH2. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::OP_MODE = (1 << 15) |
| Operation Mode. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::ALL_CH_MASK = 0x003F |
| All channel bits. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::ALL_PAR_MASK = 0x7000 |
| All parallel bits. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::DEFAULT = 0x0000 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::CONFIG_MODE = 0x0000 |
| Config Mode (OP_MODE=0) | |
| constexpr uint16_t | TLE92466ED::CH_CTRL::MISSION_MODE = OP_MODE |
| Mission Mode (OP_MODE=1) | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::CLK_WD_EN = (1 << 0) |
| Clock watchdog enable. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::SPI_WD_EN = (1 << 1) |
| SPI watchdog enable. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::CRC_EN = (1 << 2) |
| CRC check enable. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::V1V5_UV_TEST = (1 << 4) |
| 1.5V UV test | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::V1V5_OV_TEST = (1 << 5) |
| 1.5V OV test | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::OT_TEST = (1 << 12) |
| Over-temp test. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::UV_OV_SWAP = (1 << 13) |
| UV/OV swap test. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::VIO_SEL = (1 << 14) |
| VIO select (0=3.3V, 1=5V) | |
| constexpr uint16_t | TLE92466ED::GLOBAL_CONFIG::DEFAULT = 0x4005 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::VBAT_UV = (1 << 0) |
| VBAT undervoltage. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::VBAT_OV = (1 << 1) |
| VBAT overvoltage. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::VIO_UV = (1 << 2) |
| VIO undervoltage. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::VIO_OV = (1 << 3) |
| VIO overvoltage. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::VDD_UV = (1 << 4) |
| VDD undervoltage. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::VDD_OV = (1 << 5) |
| VDD overvoltage. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::CLK_NOK = (1 << 6) |
| Clock fault. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::COTERR = (1 << 7) |
| Central OT error. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::COTWARN = (1 << 8) |
| Central OT warning. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::RES_EVENT = (1 << 9) |
| Reset event. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::POR_EVENT = (1 << 10) |
| Power-on reset. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::SPI_WD_ERR = (1 << 14) |
| SPI watchdog error. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::DEFAULT = 0x0600 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG0::FAULT_MASK = 0x47FF |
| All fault bits. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::VR_IREF_UV = (1 << 0) |
| Bias current UV. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::VR_IREF_OV = (1 << 1) |
| Bias current OV. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::VDD2V5_UV = (1 << 2) |
| 2.5V supply UV | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::VDD2V5_OV = (1 << 3) |
| 2.5V supply OV | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::REF_UV = (1 << 4) |
| Reference UV. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::REF_OV = (1 << 5) |
| Reference OV. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::VPRE_OV = (1 << 6) |
| Pre-reg OV. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::HVADC_ERR = (1 << 15) |
| HV ADC error. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG1::DEFAULT = 0x0000 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG2::REG_ECC_ERR = (1 << 1) |
| Register ECC error. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG2::OTP_ECC_ERR = (1 << 3) |
| OTP ECC error. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG2::OTP_VIRGIN = (1 << 4) |
| OTP virgin/unconfigured. | |
| constexpr uint16_t | TLE92466ED::GLOBAL_DIAG2::DEFAULT = 0x0000 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::FB_STAT::SUP_NOK_INT = (1 << 0) |
| Internal supply fault. | |
| constexpr uint16_t | TLE92466ED::FB_STAT::SUP_NOK_EXT = (1 << 1) |
| External supply fault. | |
| constexpr uint16_t | TLE92466ED::FB_STAT::EN_PROT = (1 << 2) |
| Enable protection active. | |
| constexpr uint16_t | TLE92466ED::FB_STAT::INIT_DONE = (1 << 3) |
| Initialization done. | |
| constexpr uint16_t | TLE92466ED::FB_STAT::CLK_NOK_STAT = (1 << 6) |
| Clock fault status. | |
| constexpr uint16_t | TLE92466ED::SETPOINT::TARGET_MASK = 0x7FFF |
| Target current mask. | |
| constexpr uint16_t | TLE92466ED::SETPOINT::AUTO_LIMIT_DIS = (1 << 15) |
| Disable auto-limit. | |
| constexpr uint16_t | TLE92466ED::SETPOINT::DEFAULT = 0x0000 |
| Default (0A) | |
| constexpr uint16_t | TLE92466ED::SETPOINT::MAX_TARGET = 0x6000 |
| Maximum safe target value (datasheet saturates above 0x6000) | |
| constexpr uint16_t | TLE92466ED::CH_CTRL_REG::MIN_INT_THRESH_MASK = 0x00FF |
| Min threshold mask. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL_REG::PWM_PERIOD_CALC_MODE = (1 << 8) |
| PWM calc mode. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL_REG::OLSG_WARN_WINDOW_MASK = 0x3E00 |
| OLSG window mask. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL_REG::OLSG_WARN_WINDOW_SHIFT = 9 |
| OLSG window shift. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL_REG::OLSG_WARN_EN = (1 << 14) |
| OLSG warn enable. | |
| constexpr uint16_t | TLE92466ED::CH_CTRL_REG::DEFAULT = 0x4600 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::SLEWR_1V0_US = 0b00 |
| 1.0 V/µs | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::SLEWR_2V5_US = 0b01 |
| 2.5 V/µs | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::SLEWR_5V0_US = 0b10 |
| 5.0 V/µs | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::SLEWR_10V0_US = 0b11 |
| 10.0 V/µs | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::SLEWR_MASK = 0x0003 |
| Slew rate mask. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::I_DIAG_80UA = (0 << 2) |
| 80 µA | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::I_DIAG_190UA = (1 << 2) |
| 190 µA | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::I_DIAG_720UA = (2 << 2) |
| 720 µA | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::I_DIAG_1250UA = (3 << 2) |
| 1250 µA | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::I_DIAG_MASK = 0x000C |
| I_DIAG mask. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_DISABLED = (0 << 4) |
| OL detection disabled. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_1_8 = (1 << 4) |
| 1/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_2_8 = (2 << 4) |
| 2/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_3_8 = (3 << 4) |
| 3/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_4_8 = (4 << 4) |
| 4/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_5_8 = (5 << 4) |
| 5/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_6_8 = (6 << 4) |
| 6/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_7_8 = (7 << 4) |
| 7/8 of setpoint | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_MASK = 0x0070 |
| OL threshold mask. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_FIXED_SHIFT = 7 |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OL_TH_FIXED_MASK = 0x1F80 |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OC_DIAG_EN = (1 << 13) |
| OC diag in OFF state. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OFF_DIAG_ENABLED = (0 << 14) |
| OFF diag enabled. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OFF_DIAG_LS_ONLY = (1 << 14) |
| Low side current only. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OFF_DIAG_HS_ONLY = (2 << 14) |
| High side current only. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::OFF_DIAG_MASK = 0xC000 |
| OFF diag mask. | |
| constexpr uint16_t | TLE92466ED::CH_CONFIG::DEFAULT = 0x0003 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::OFF = 0x0000 |
| Channel off. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::ICC_CURRENT_CTRL = 0x0001 |
| ICC current control. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::DIRECT_DRIVE_SPI = 0x0002 |
| Direct drive via SPI. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::DIRECT_DRIVE_DRV0 = 0x0003 |
| Direct drive via DRV0 pin. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::DIRECT_DRIVE_DRV1 = 0x0004 |
| Direct drive via DRV1 pin. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::FREE_RUN_MEAS = 0x000C |
| Free running measurement. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::MODE_MASK = 0x000F |
| Mode mask. | |
| constexpr uint16_t | TLE92466ED::CH_MODE::DEFAULT = OFF |
| Default (off) | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::STEP_SIZE_MASK = 0x0FFF |
| Step size mask. | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::DEEP_DITHER = (1 << 13) |
| Deep dither enable. | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::FAST_MEAS_DITH = (0 << 14) |
| Dither period. | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::FAST_MEAS_HALF = (1 << 14) |
| Half dither period. | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::FAST_MEAS_QUAD = (2 << 14) |
| Quarter dither period. | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::FAST_MEAS_MASK = 0xC000 |
| Fast meas mask. | |
| constexpr uint16_t | TLE92466ED::DITHER_CTRL::DEFAULT = 0x0000 |
| Default value. | |
| constexpr uint16_t | TLE92466ED::DITHER_STEP::FLAT_MASK = 0x00FF |
| Flat period mask. | |
| constexpr uint16_t | TLE92466ED::DITHER_STEP::STEPS_SHIFT = 8 |
| Steps shift. | |
| constexpr uint16_t | TLE92466ED::DITHER_STEP::STEPS_MASK = 0xFF00 |
| Steps mask. | |
| constexpr uint16_t | TLE92466ED::DITHER_STEP::DEFAULT = 0x0000 |
| Default value. | |
Register definitions and bit field mappings for TLE92466ED IC.
This file contains comprehensive register definitions, bit field masks, and helper structures for the TLE92466ED Six-Channel Low-Side Solenoid Driver IC. All register addresses and bit positions have been meticulously cross-referenced with the official Infineon datasheet (Rev. 1.2, 2022-02-01).
The TLE92466ED features: