HF-TMC51x0 Driver (TMC5130 & TMC5160) 0.1.0-dev
Hardware Agnostic C++ Driver for the TMC51x0 (TMC5130 & TMC5160)
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tmc51x0::GCONF_Register Union Reference

General configuration register (GCONF) More...

#include <tmc51x0_registers.hpp>

Public Attributes

uint32_t value
 
struct { 
 
   uint32_t   recalibrate: 1 
 
   uint32_t   faststandstill: 1 
 
   uint32_t   en_pwm_mode: 1 
 
   uint32_t   multistep_filt: 1 
 
   uint32_t   shaft: 1 
 Bit 4: 1=Inverse motor direction. More...
 
   uint32_t   diag0_error: 1 
 
   uint32_t   diag0_otpw: 1 
 
   uint32_t   diag0_stall_step: 1 
 
   uint32_t   diag1_stall_dir: 1 
 
   uint32_t   diag1_index: 1 
 
   uint32_t   diag1_onstate: 1 
 
   uint32_t   diag1_steps_skipped: 1 
 
   uint32_t   diag0_int_pushpull: 1 
 
   uint32_t   diag1_poscomp_pushpull: 1 
 
   uint32_t   small_hysteresis: 1 
 
   uint32_t   stop_enable: 1 
 
   uint32_t   direct_mode: 1 
 
   uint32_t   test_mode: 1 
 
   uint32_t   reserved: 14 
 Bits 18-31: Reserved. More...
 
bits 
 

Detailed Description

General configuration register (GCONF)

Global configuration flags for the TMC5160 driver.

Bit assignments per datasheet:

  • Bit 0: recalibrate - 1: Zero crossing recalibration during driver disable (via DRV_ENN or via TOFF setting)
  • Bit 1: faststandstill - Timeout for step execution until standstill detection: 1=Short time (2^18 clocks), 0=Normal time (2^20 clocks)
  • Bit 2: en_pwm_mode - 1: StealthChop voltage PWM mode enabled (depending on velocity thresholds). Switch from off to on state while in stand-still and at IHOLD=nominal IRUN current, only.
  • Bit 3: multistep_filt - 1: Enable step input filtering for StealthChop optimization with external step source (default=1)
  • Bit 4: shaft - 1: Inverse motor direction
  • Bit 5: diag0_error - (only with SD_MODE=1) 1: Enable DIAG0 active on driver errors: Over temperature (ot), short to GND (s2g). DIAG0 always shows the reset-status, i.e., is active low during reset condition.
  • Bit 6: diag0_otpw - (only with SD_MODE=1) 1: Enable DIAG0 active on driver over temperature prewarning (otpw)
  • Bit 7: diag0_stall - (with SD_MODE=1) 1: Enable DIAG0 active on motor stall (set TCOOLTHRS before using this feature) diag0_step - (with SD_MODE=0) 0: DIAG0 outputs interrupt signal, 1: Enable DIAG0 as STEP output (half frequency, dual edge triggered) for external STEP/DIR driver
  • Bit 8: diag1_stall - (with SD_MODE=1) 1: Enable DIAG1 active on motor stall (set TCOOLTHRS before using this feature) diag1_dir - (with SD_MODE=0) 0: DIAG1 outputs position compare signal, 1: Enable DIAG1 as DIR output for external STEP/DIR driver
  • Bit 9: diag1_index - (only with SD_MODE=1) 1: Enable DIAG1 active on index position (microstep look up table position 0)
  • Bit 10: diag1_onstate - (only with SD_MODE=1) 1: Enable DIAG1 active when chopper is on (for the coil which is in the second half of the fullstep)
  • Bit 11: diag1_steps_skipped - (only with SD_MODE=1) 1: Enable output toggle when steps are skipped in DcStep mode (increment of LOST_STEPS). Do not enable in conjunction with other DIAG1 options.
  • Bit 12: diag0_int_pushpull - 0: SWN_DIAG0 is open collector output (active low), 1: Enable SWN_DIAG0 push pull output (active high)
  • Bit 13: diag1_poscomp_pushpull - 0: SWP_DIAG1 is open collector output (active low), 1: Enable SWP_DIAG1 push pull output (active high)
  • Bit 14: small_hysteresis - 0: Hysteresis for step frequency comparison is 1/16, 1: Hysteresis for step frequency comparison is 1/32
  • Bit 15: stop_enable - 0: Normal operation, 1: Emergency stop: ENCA_DCIN stops the sequencer when tied high (no steps become executed by the sequencer, motor goes to standstill state)
  • Bit 16: direct_mode - 0: Normal operation, 1: Motor coil currents and polarity directly programmed via serial interface: Register XTARGET (0x2D) specifies signed coil A current (bits 8..0) and coil B current (bits 24..16). In this mode, the current is scaled by IHOLD setting. Velocity based current regulation of StealthChop is not available in this mode.
  • Bit 17: test_mode - 0: Normal operation, 1: Enable analog test output on pin ENCN_DCO. IHOLD[1..0] selects the function of ENCN_DCO: 0...2: T120, DAC, VDDH. Hint: Not for user, set to 0 for normal operation!
  • Bits 18-31: Reserved

Member Data Documentation

◆ [struct]

struct { ... } tmc51x0::GCONF_Register::bits

◆ diag0_error

uint32_t tmc51x0::GCONF_Register::diag0_error

Bit 5: (only with SD_MODE=1) 1=Enable DIAG0 active on driver errors (OT, S2G, UV_CP). DIAG0 always shows reset-status.

◆ diag0_int_pushpull

uint32_t tmc51x0::GCONF_Register::diag0_int_pushpull

Bit 12: SWN_DIAG0 output: 0=open collector (active low), 1=push pull (active high)

◆ diag0_otpw

uint32_t tmc51x0::GCONF_Register::diag0_otpw

Bit 6: (only with SD_MODE=1) 1=Enable DIAG0 active on driver over temperature prewarning (otpw)

◆ diag0_stall_step

uint32_t tmc51x0::GCONF_Register::diag0_stall_step

Bit 7: (SD_MODE=1) 1=Enable DIAG0 active on motor stall (set TCOOLTHRS before using). (SD_MODE=0) 0=DIAG0 outputs interrupt signal, 1=Enable DIAG0 as STEP output (half frequency, dual edge triggered)

◆ diag1_index

uint32_t tmc51x0::GCONF_Register::diag1_index

Bit 9: (only with SD_MODE=1) 1=Enable DIAG1 active on index position (microstep look up table position 0)

◆ diag1_onstate

uint32_t tmc51x0::GCONF_Register::diag1_onstate

Bit 10: (only with SD_MODE=1) 1=Enable DIAG1 active when chopper is on (for the coil which is in the second half of the fullstep)

◆ diag1_poscomp_pushpull

uint32_t tmc51x0::GCONF_Register::diag1_poscomp_pushpull

Bit 13: SWP_DIAG1 output: 0=open collector (active low), 1=push pull (active high)

◆ diag1_stall_dir

uint32_t tmc51x0::GCONF_Register::diag1_stall_dir

Bit 8: (SD_MODE=1) 1=Enable DIAG1 active on motor stall (set TCOOLTHRS before using). (SD_MODE=0) 0=DIAG1 outputs position compare signal, 1=Enable DIAG1 as DIR output

◆ diag1_steps_skipped

uint32_t tmc51x0::GCONF_Register::diag1_steps_skipped

Bit 11: (only with SD_MODE=1) 1=Enable output toggle when steps are skipped in DcStep mode (increment of LOST_STEPS). Do not enable in conjunction with other DIAG1 options.

◆ direct_mode

uint32_t tmc51x0::GCONF_Register::direct_mode

Bit 16: 0=Normal operation, 1=Direct motor coil control: XTARGET bits 8..0=coil A current, bits 24..16=coil B current (scaled by IHOLD). Velocity based current regulation of StealthChop not available.

◆ en_pwm_mode

uint32_t tmc51x0::GCONF_Register::en_pwm_mode

Bit 2: 1=StealthChop voltage PWM mode enabled (depending on velocity thresholds). Switch only in stand-still at IHOLD=nominal IRUN.

◆ faststandstill

uint32_t tmc51x0::GCONF_Register::faststandstill

Bit 1: Standstill timeout: 1=Short time (2^18 clocks), 0=Normal time (2^20 clocks)

◆ multistep_filt

uint32_t tmc51x0::GCONF_Register::multistep_filt

Bit 3: 1=Enable step input filtering for StealthChop optimization with external step source (default=1)

◆ recalibrate

uint32_t tmc51x0::GCONF_Register::recalibrate

Bit 0: 1=Zero crossing recalibration during driver disable (via DRV_ENN or via TOFF setting)

◆ reserved

uint32_t tmc51x0::GCONF_Register::reserved

Bits 18-31: Reserved.

◆ shaft

uint32_t tmc51x0::GCONF_Register::shaft

Bit 4: 1=Inverse motor direction.

◆ small_hysteresis

uint32_t tmc51x0::GCONF_Register::small_hysteresis

Bit 14: Step frequency comparison hysteresis: 0=1/16, 1=1/32

◆ stop_enable

uint32_t tmc51x0::GCONF_Register::stop_enable

Bit 15: 0=Normal operation, 1=Emergency stop: ENCA_DCIN stops the sequencer when tied high (no steps become executed, motor goes to standstill)

◆ test_mode

uint32_t tmc51x0::GCONF_Register::test_mode

Bit 17: 0=Normal operation, 1=Enable analog test output on pin ENCN_DCO. IHOLD[1..0] selects function (0..2: T120, DAC, VDDH). Hint: Not for user, set to 0!

◆ value

uint32_t tmc51x0::GCONF_Register::value

The documentation for this union was generated from the following file: