HF-TMC51x0 Driver (TMC5130 & TMC5160) 0.1.0-dev
Hardware Agnostic C++ Driver for the TMC51x0 (TMC5130 & TMC5160)
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tmc51x0::IHOLD_IRUN_Register Union Reference

Driver current control register (IHOLD_IRUN) More...

#include <tmc51x0_registers.hpp>

Public Attributes

uint32_t value
 
struct { 
 
   uint32_t   ihold: 5 
 Bits 4..0: Standstill current (0=1/32...31=32/32) More...
 
   uint32_t   reserved1: 3 
 Reserved bits (5..7) More...
 
   uint32_t   irun: 5 
 Bits 12..8: Motor run current (0=1/32...31=32/32) More...
 
   uint32_t   reserved2: 3 
 Reserved bits (13..15) More...
 
   uint32_t   iholddelay: 4 
 Bits 19..16: Motor power down delay (0-15) More...
 
   uint32_t   reserved3: 12 
 Reserved bits (20..31) More...
 
bits 
 

Detailed Description

Driver current control register (IHOLD_IRUN)

Configuration for motor run current and standstill current.

Bit assignments per datasheet:

  • Bits 4..0: IHOLD - Standstill current (0=1/32...31=32/32) In combination with StealthChop mode, setting IHOLD=0 allows to choose freewheeling or coil short circuit for motor stand still.
  • Bits 12..8: IRUN - Motor run current (0=1/32...31=32/32) Choose sense resistors so that normal IRUN is 16 to 31 for best microstep performance.
  • Bits 19..16: IHOLDDELAY - Controls the number of clock cycles for motor power down after motion as soon as standstill is detected (stst=1) and TPOWERDOWN has expired. The smooth transition avoids a motor jerk upon power down. 0: instant power down 1..15: Delay per current reduction step in multiple of 2^18 clocks

Member Data Documentation

◆ [struct]

struct { ... } tmc51x0::IHOLD_IRUN_Register::bits

◆ ihold

uint32_t tmc51x0::IHOLD_IRUN_Register::ihold

Bits 4..0: Standstill current (0=1/32...31=32/32)

◆ iholddelay

uint32_t tmc51x0::IHOLD_IRUN_Register::iholddelay

Bits 19..16: Motor power down delay (0-15)

◆ irun

uint32_t tmc51x0::IHOLD_IRUN_Register::irun

Bits 12..8: Motor run current (0=1/32...31=32/32)

◆ reserved1

uint32_t tmc51x0::IHOLD_IRUN_Register::reserved1

Reserved bits (5..7)

◆ reserved2

uint32_t tmc51x0::IHOLD_IRUN_Register::reserved2

Reserved bits (13..15)

◆ reserved3

uint32_t tmc51x0::IHOLD_IRUN_Register::reserved3

Reserved bits (20..31)

◆ value

uint32_t tmc51x0::IHOLD_IRUN_Register::value

The documentation for this union was generated from the following file: