Input pin register (IOIN) - Read-only at address 0x04. More...

#include <tmc51x0_registers.hpp>

Public Attributes
uint32_t	value

struct {

uint32_t refl_step: 1
	Reference left / step input. More...

uint32_t refr_dir: 1
	Reference right / direction input. More...

uint32_t encb_dcen_cfg4: 1
	Encoder B / DCEN / CFG4. More...

uint32_t enca_dcin_cfg5: 1
	Encoder A / DCIN / CFG5. More...

uint32_t drv_enn: 1
	Driver enable (inverted) More...

uint32_t enc_n_dco_cfg6: 1
	Encoder N / DCO / CFG6. More...

uint32_t sd_mode: 1
	1=External step and dir source More...

uint32_t swcomp_in: 1
	Software comparator input. More...

uint32_t reserved: 16
	Reserved bits. More...

uint32_t version: 8
	IC version. More...

}	bits

Detailed Description

Input pin register (IOIN) - Read-only at address 0x04.

Output pin register (OUTPUT) - Write-only at address 0x04

Read input pins or write output pins configuration.

Member Data Documentation

◆ [struct]

struct { ... } tmc51x0::IOIN_Register::bits

◆ drv_enn

uint32_t tmc51x0::IOIN_Register::drv_enn

Driver enable (inverted)

◆ enc_n_dco_cfg6

uint32_t tmc51x0::IOIN_Register::enc_n_dco_cfg6

Encoder N / DCO / CFG6.

◆ enca_dcin_cfg5

uint32_t tmc51x0::IOIN_Register::enca_dcin_cfg5

Encoder A / DCIN / CFG5.

◆ encb_dcen_cfg4

uint32_t tmc51x0::IOIN_Register::encb_dcen_cfg4

Encoder B / DCEN / CFG4.

◆ refl_step

uint32_t tmc51x0::IOIN_Register::refl_step

Reference left / step input.

◆ refr_dir

uint32_t tmc51x0::IOIN_Register::refr_dir

Reference right / direction input.

◆ reserved

uint32_t tmc51x0::IOIN_Register::reserved

Reserved bits.

◆ sd_mode

uint32_t tmc51x0::IOIN_Register::sd_mode

1=External step and dir source

◆ swcomp_in

uint32_t tmc51x0::IOIN_Register::swcomp_in

Software comparator input.

◆ value

uint32_t tmc51x0::IOIN_Register::value

◆ version

uint32_t tmc51x0::IOIN_Register::version

IC version.

The documentation for this union was generated from the following file:

tmc51x0_registers.hpp

Public Attributes