AS5047U_REG::SETTINGS2 Struct Reference

SETTINGS2 – Custom setting register 2 (0x0019, default 0x0000) More...

#include <as5047u_registers.hpp>

Public Types
enum class	IndexWidth : uint8_t { Width3LSB = 0 , Width1LSB = 1 }
	Index pulse width options (IWIDTH bit) More...
enum class	NoiseSetting : uint8_t { Normal = 0 , HighTemp = 1 }
	High-temperature noise reduction setting (NOISESET bit) More...
enum class	RotationDirection : uint8_t { Normal = 0 , Inverted = 1 }
	Rotation direction setting (DIR bit) – defines incremental output phase sense. More...
enum class	OutputInterfaceMode : uint8_t { ABI_PWM_on_W = 0 , UVW_PWM_on_I = 1 }
	Output interface selection for ABI vs UVW and PWM mapping (UVW_ABI bit) More...
enum class	DynamicCompensation : uint8_t { Enabled = 0 , Disabled = 1 }
	Dynamic angle error compensation (DAEC) mode (DAECDIS bit) More...
enum class	ABICountMode : uint8_t { Binary = 0 , Decimal = 1 }
	ABI resolution counting mode (ABI_DEC bit) – binary vs decimal pulses per revolution. More...
enum class	AngleOutputSource : uint8_t { UseANGLECOM = 0 , UseANGLEUNC = 1 }
	Angle data source for 0x3FFF output (Data_select bit) More...
enum class	PWMMode : uint8_t { Disabled = 0 , Enabled = 1 }
	PWM output enable (PWMon bit) More...

Public Attributes
union {
uint16_t   value
struct {
uint16_t   IWIDTH: 1
uint16_t   NOISESET: 1
uint16_t   DIR: 1
uint16_t   UVW_ABI: 1
uint16_t   DAECDIS: 1
uint16_t   ABI_DEC: 1
uint16_t   Data_select: 1
uint16_t   PWMon: 1
uint16_t   reserved_8_15: 8
}   bits
};

Static Public Attributes
static constexpr uint16_t	ADDRESS = 0x0019

Detailed Description

SETTINGS2 – Custom setting register 2 (0x0019, default 0x0000)

Bits	Name	R/W/P	Description
0	IWIDTH	R/W/P	Index pulse width (0: 3 LSB pulses (default), 1: 1 LSB pulse)
1	NOISESET	R/W/P	Noise setting for 3.3V operation at 150°C (0: Normal noise,

| | | 1: Reduced noise) 2 | DIR | R/W/P | Rotation direction setting (0: CW default, 1: Invert direction) 3 | UVW_ABI | R/W/P | Select ABI or UVW interface for outputs and PWM (0: ABI active, | | | PWM on W; 1: UVW active, PWM on I) 4 | DAECDIS | R/W/P | Dynamic angle error compensation disable (0: DAEC on (default), | | | 1: DAEC off) 5 | ABI_DEC | R/W/P | ABI decimal count enable (0: Binary resolution, 1: Decimal pulses | | | per revolution) 6 | Data_select | R/W/P | Selects angle data at 0x3FFF (0: ANGLECOM, 1: ANGLEUNC readout) 7 | PWMon | R/W/P | PWM output enable (0: PWM disabled, 1: PWM enabled) 8-15 | (unused) | - | Unused upper bits (reads 0)

This register configures various interface options. IWIDTH sets the index pulse width in the ABI interface. DIR inverts the direction of the incremental signals (defines rotation direction as clockwise when DIR=0). UVW_ABI selects which incremental interface is active and which pin outputs the PWM signal. Setting DAECDIS=1 disables dynamic angle error compensation (the angle outputs will be raw). ABI_DEC=1 selects a decimal pulse count per revolution (e.g., 1000 ppr) instead of binary powers of two. Data_select controls whether the 0x3FFF address returns the compensated or uncompensated angle. PWM output must be enabled (PWMon=1) and mapped via UVW_ABI.

Member Enumeration Documentation

ABICountMode

enum class AS5047U_REG::SETTINGS2::ABICountMode : uint8_t

strong

ABI resolution counting mode (ABI_DEC bit) – binary vs decimal pulses per revolution.

Enumerator
Binary	Binary resolution (2^N steps per revolution)
Decimal	Decimal resolution (e.g., 1000 pulses per revolution if configured)

AngleOutputSource

enum class AS5047U_REG::SETTINGS2::AngleOutputSource : uint8_t

strong

Angle data source for 0x3FFF output (Data_select bit)

Enumerator
UseANGLECOM	0x3FFF reads ANGLECOM (compensated angle)
UseANGLEUNC	0x3FFF reads ANGLEUNC (uncompensated angle)

DynamicCompensation

enum class AS5047U_REG::SETTINGS2::DynamicCompensation : uint8_t

strong

Dynamic angle error compensation (DAEC) mode (DAECDIS bit)

Enumerator
Enabled	DAEC enabled (dynamic compensation ON, default)
Disabled	DAEC disabled (output raw angle without comp.)

IndexWidth

enum class AS5047U_REG::SETTINGS2::IndexWidth : uint8_t

strong

Index pulse width options (IWIDTH bit)

Enumerator
Width3LSB	3 LSB long index pulse (default)
Width1LSB	1 LSB long index pulse

NoiseSetting

enum class AS5047U_REG::SETTINGS2::NoiseSetting : uint8_t

strong

High-temperature noise reduction setting (NOISESET bit)

Enumerator
Normal	Normal noise setting (for typical conditions)
HighTemp	Reduced noise for 3.3V operation at ~150°C (use at high temp)

OutputInterfaceMode

enum class AS5047U_REG::SETTINGS2::OutputInterfaceMode : uint8_t

strong

Output interface selection for ABI vs UVW and PWM mapping (UVW_ABI bit)

Enumerator
ABI_PWM_on_W	ABI signals active (A,B,I); PWM output on W pin
UVW_PWM_on_I	UVW signals active; PWM output on I (index) pin

PWMMode

enum class AS5047U_REG::SETTINGS2::PWMMode : uint8_t

strong

PWM output enable (PWMon bit)

Enumerator
Disabled	PWM output disabled
Enabled	PWM output enabled

RotationDirection

enum class AS5047U_REG::SETTINGS2::RotationDirection : uint8_t

strong

Rotation direction setting (DIR bit) – defines incremental output phase sense.

Enumerator
Normal	Default rotation direction (CW defined as DIR=0)
Inverted	Inverted rotation direction (swap A/B phasing)

Member Data Documentation

[union]

union { ... } AS5047U_REG::SETTINGS2

ABI_DEC

uint16_t AS5047U_REG::SETTINGS2::ABI_DEC

ADDRESS

constexpr uint16_t AS5047U_REG::SETTINGS2::ADDRESS = 0x0019

staticconstexpr

[struct]

struct { ... } AS5047U_REG::SETTINGS2::bits

DAECDIS

uint16_t AS5047U_REG::SETTINGS2::DAECDIS

Data_select

uint16_t AS5047U_REG::SETTINGS2::Data_select

DIR

uint16_t AS5047U_REG::SETTINGS2::DIR

IWIDTH

uint16_t AS5047U_REG::SETTINGS2::IWIDTH

NOISESET

uint16_t AS5047U_REG::SETTINGS2::NOISESET

PWMon

uint16_t AS5047U_REG::SETTINGS2::PWMon

reserved_8_15

uint16_t AS5047U_REG::SETTINGS2::reserved_8_15

UVW_ABI

uint16_t AS5047U_REG::SETTINGS2::UVW_ABI

value

uint16_t AS5047U_REG::SETTINGS2::value

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The documentation for this struct was generated from the following file:

• inc/as5047u_registers.hpp