Implementation of ESP32-integrated I2C controller with proper bus-device architecture.
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Implementation of ESP32-integrated I2C controller with proper bus-device architecture.
This file provides the implementation for I2C bus communication using the ESP32's built-in I2C peripheral with full ESP-IDF v5.5+ capabilities and proper separation of bus and device management following the same pattern as EspSpi.
Key architectural improvements:
- Proper bus-device separation matching ESP-IDF v5.5+ API design
- EspI2cBus manages the I2C bus and device creation
- EspI2cDevice represents individual devices and inherits from BaseI2c
- Thread-safe operations with proper resource management
- Comprehensive error handling with ESP-IDF error conversion
- Per-device statistics and diagnostics
- Automatic resource cleanup and lifecycle management
The implementation closely follows ESP-IDF v5.5 I2C Master driver documentation: https://docs.espressif.com/projects/esp-idf/en/release-v5.5/esp32c6/api-reference/peripherals/i2c.html
- Author
- Nebiyu Tadesse
- Date
- 2025
- Copyright
- HardFOC
- Note
- Fully compliant with ESP-IDF v5.5 I2C Master driver API
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Optimized for ESP32C6 hardware capabilities
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Thread-safe for multi-device I2C bus management
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Follows the same architectural pattern as EspSpi