HF-TMC9660 Driver 0.1.0-dev
Hardware Agnostic C++ Driver for the TMC9660
Loading...
Searching...
No Matches
tmc9660::register_mode::ADC::STATUS_FLAGS Struct Reference

ADC Status Flags Register for monitoring ADC health and readiness. More...

#include <tmc9660_adc.hpp>

Public Attributes

union { 
 
   uint32_t   value 
 
   struct { 
 
      uint32_t   RDY_ADC_0: 1 
 ADC0 ready. More...
 
      uint32_t   RDY_ADC_1: 1 
 ADC1 ready. More...
 
      uint32_t   RDY_ADC_2: 1 
 ADC2 ready. More...
 
      uint32_t   RDY_ADC_3: 1 
 ADC3 ready. More...
 
      uint32_t   : 4 
 
      uint32_t   ADC0_WTCHDG_FAIL: 1 
 ADC0 watchdog fail. More...
 
      uint32_t   ADC1_WTCHDG_FAIL: 1 
 ADC1 watchdog fail. More...
 
      uint32_t   ADC2_WTCHDG_FAIL: 1 
 ADC2 watchdog fail. More...
 
      uint32_t   ADC3_WTCHDG_FAIL: 1 
 ADC3 watchdog fail. More...
 
      uint32_t   ADC0_MUXSEQ_FAIL: 1 
 ADC0 sequence configuration error. More...
 
      uint32_t   ADC1_MUXSEQ_FAIL: 1 
 ADC1 sequence configuration error. More...
 
      uint32_t   ADC2_MUXSEQ_FAIL: 1 
 ADC2 sequence configuration error. More...
 
      uint32_t   ADC3_MUXSEQ_FAIL: 1 
 ADC3 sequence configuration error. More...
 
      uint32_t   : 16 
 
   }   bits 
 
};  
 

Static Public Attributes

static constexpr uint8_t ADDRESS = 0x05
 Register address (Block 1)
 

Detailed Description

ADC Status Flags Register for monitoring ADC health and readiness.

Provides real-time status information about each ADC channel including readiness flags, watchdog failures, and sequence configuration errors. These flags are essential for monitoring ADC calibration status and detecting measurement failures that could affect motor control accuracy.

Watchdog failures indicate ADC measurement timeouts, while sequence configuration errors suggest improper multiplexer setup that could lead to incorrect measurements or system instability.

Status flags for the ADC block.

Block 1, Address: 0x005

Register Map:

Bits Name Access Description
15 ADC3_MUXSEQ_FAIL R ADC3 sequence configuration error.
14 ADC2_MUXSEQ_FAIL R ADC2 sequence configuration error.
13 ADC1_MUXSEQ_FAIL R ADC1 sequence configuration error.
12 ADC0_MUXSEQ_FAIL R ADC0 sequence configuration error.
11 ADC3_WTCHDG_FAIL R ADC3 watchdog fail.
10 ADC2_WTCHDG_FAIL R ADC2 watchdog fail.
9 ADC1_WTCHDG_FAIL R ADC1 watchdog fail.
8 ADC0_WTCHDG_FAIL R ADC0 watchdog fail.
3 RDY_ADC_3 R ADC3 ready.
2 RDY_ADC_2 R ADC2 ready.
1 RDY_ADC_1 R ADC1 ready.
0 RDY_ADC_0 R ADC0 ready.
Note
This register provides status flags for ADC calibration and errors.

Member Data Documentation

◆ [union]

◆ __pad0__

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::__pad0__

◆ __pad1__

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::__pad1__

◆ ADC0_MUXSEQ_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC0_MUXSEQ_FAIL

ADC0 sequence configuration error.

◆ ADC0_WTCHDG_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC0_WTCHDG_FAIL

ADC0 watchdog fail.

◆ ADC1_MUXSEQ_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC1_MUXSEQ_FAIL

ADC1 sequence configuration error.

◆ ADC1_WTCHDG_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC1_WTCHDG_FAIL

ADC1 watchdog fail.

◆ ADC2_MUXSEQ_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC2_MUXSEQ_FAIL

ADC2 sequence configuration error.

◆ ADC2_WTCHDG_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC2_WTCHDG_FAIL

ADC2 watchdog fail.

◆ ADC3_MUXSEQ_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC3_MUXSEQ_FAIL

ADC3 sequence configuration error.

◆ ADC3_WTCHDG_FAIL

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADC3_WTCHDG_FAIL

ADC3 watchdog fail.

◆ ADDRESS

constexpr uint8_t tmc9660::register_mode::ADC::STATUS_FLAGS::ADDRESS = 0x05
staticconstexpr

Register address (Block 1)

◆ [struct]

struct { ... } tmc9660::register_mode::ADC::STATUS_FLAGS::bits

◆ RDY_ADC_0

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::RDY_ADC_0

ADC0 ready.

◆ RDY_ADC_1

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::RDY_ADC_1

ADC1 ready.

◆ RDY_ADC_2

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::RDY_ADC_2

ADC2 ready.

◆ RDY_ADC_3

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::RDY_ADC_3

ADC3 ready.

◆ value

uint32_t tmc9660::register_mode::ADC::STATUS_FLAGS::value

The documentation for this struct was generated from the following file: