bootloader_config.hpp

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#pragma once
#include <cstdint>
 
namespace tmc9660 {
 
namespace bootcfg {
 
enum class LDOVoltage : uint8_t {
  Disabled = 0, 
  V2_5 = 1,     
  V3_3 = 2,     
  V5_0 = 3,     
};
 
enum class LDOSlope : uint8_t {
  Slope3ms = 0,    
  Slope1_5ms = 1,  
  Slope0_75ms = 2, 
  Slope0_37ms = 3, 
};
 
enum class BootMode : uint8_t {
  Register = 1,  
  Parameter = 2, 
};
 
enum class UartRxPin : uint8_t {
  GPIO7 = 0, 
  GPIO1 = 1  
};
 
enum class UartTxPin : uint8_t {
  GPIO6 = 0, 
  GPIO0 = 1  
};
 
enum class BaudRate : uint8_t {
  BR9600 = 0, 
  BR19200,    
  BR38400,    
  BR57600,    
  BR115200,   
  BR1000000,  
  Auto8x,     
  Auto16x,    
};
 
enum class RS485TxEnPin : uint8_t {
  None = 0,  
  GPIO8 = 1, 
  GPIO2 = 2  
};
 
enum class SPIInterface : uint8_t {
  SPI0 = 0, 
  SPI1 = 1  
};
 
enum class SPI0SckPin : uint8_t {
  GPIO6 = 0, 
  GPIO11 = 1 
};
 
enum class SPIFlashFreq : uint8_t {
  Div1 = 0, 
  Div2 = 1, 
  Div4 = 3  
};
 
enum class I2CSdaPin : uint8_t {
  GPIO5 = 0,  
  GPIO11 = 1, 
  GPIO14 = 2  
};
 
enum class I2CSclPin : uint8_t {
  GPIO4 = 0,  
  GPIO12 = 1, 
  GPIO13 = 2  
};
 
enum class I2CFreq : uint8_t {
  Freq100k = 0, 
  Freq200k,     
  Freq400k,     
  Freq800k      
};
 
enum class ClockSource : uint8_t {
  Internal = 0, 
  External = 1  
};
 
enum class ExtSourceType : uint8_t {
  Oscillator = 0, 
  Clock = 1       
};
 
enum class XtalDrive : uint8_t {
  Freq8MHz = 1,  
  Freq16MHz = 3, 
  Freq24MHz = 5, 
  Freq32MHz = 6, 
};
 
enum class SysClkSource : uint8_t {
  IntOsc = 0, 
  PLL = 1     
};
 
enum class SysClkDiv : uint8_t {
  Div1 = 0,    
  Div15MHz = 3 
};
 
enum class HallUPin : uint8_t {
  GPIO2 = 0, 
  GPIO7 = 1, 
  GPIO9 = 2  
};
 
enum class HallVPin : uint8_t {
  GPIO3 = 0, 
  GPIO15 = 1 
};
 
enum class HallWPin : uint8_t {
  GPIO4 = 0, 
  GPIO8 = 1, 
  GPIO10 = 2 
};
 
enum class ABN1APin : uint8_t {
  GPIO5 = 0, 
  GPIO8 = 1, 
  GPIO17 = 2 
};
 
enum class ABN1BPin : uint8_t {
  GPIO1 = 0,  
  GPIO13 = 1, 
  GPIO18 = 2  
};
 
enum class ABN1NPin : uint8_t {
  Disabled = 0, 
  GPIO14 = 1,   
  GPIO16 = 2    
};
 
enum class ABN2APin : uint8_t {
  GPIO6 = 0, 
  GPIO15 = 1 
};
 
enum class ABN2BPin : uint8_t {
  GPIO7 = 0,  
  GPIO11 = 1, 
  GPIO16 = 2  
};
 
enum class RefLPin : uint8_t {
  Disabled = 0, 
  GPIO2 = 1,    
  GPIO12 = 2,   
  GPIO16 = 3    
};
 
enum class RefRPin : uint8_t {
  Disabled = 0, 
  GPIO3 = 1,    
  GPIO18 = 2    
};
 
enum class RefHPin : uint8_t {
  Disabled = 0, 
  GPIO4 = 1,    
  GPIO7 = 2,    
  GPIO15 = 3,   
  GPIO17 = 4    
};
 
enum class StepPin : uint8_t {
  GPIO7 = 0,  
  GPIO11 = 1, 
  GPIO16 = 2  
};
 
enum class DirPin : uint8_t {
  GPIO6 = 0, 
  GPIO15 = 1 
};
 
enum class SPIEncBlock : uint8_t {
  SPI0 = 0, 
  SPI1 = 1  
};
 
enum class SPIEncMode : uint8_t {
  Mode0 = 0, 
  Mode1 = 1, 
  Mode2 = 2, 
  Mode3 = 3  
};
 
enum class SPIEncFreq : uint8_t {
  Div4 = 0,   
  Div5 = 1,   
  Div6 = 2,   
  Div7 = 3,   
  Div8 = 4,   
  Div9 = 5,   
  Div10 = 6,  
  Div11 = 7,  
  Div12 = 8,  
  Div13 = 9,  
  Div14 = 10, 
  Div15 = 11, 
  Div16 = 12, 
  Div17 = 13, 
  Div18 = 14, 
  Div19 = 15  
};
 
enum class SPIEncCSPin : uint8_t {
  // SPI0 options
  GPIO8 = 0,  
  GPIO12 = 1, 
  GPIO13 = 2, 
  GPIO16 = 3, 
  // SPI1 options (same enum values, context determines which)
  GPIO15_SPI1 = 0 
};
 
enum class SPIEncCSPol : uint8_t {
  ActiveHigh = 0, 
  ActiveLow = 1   
};
 
enum class MechBrakeOutput : uint8_t {
  GPIO8 = 0,  
  GPIO10 = 1, 
  GPIO18 = 2, 
  Y2_LS = 3   
};
 
enum class BrakeChopperOutput : uint8_t {
  GPIO0 = 0,   
  GPIO1 = 1,   
  GPIO2 = 2,   
  GPIO3 = 3,   
  GPIO4 = 4,   
  GPIO5 = 5,   
  GPIO6 = 6,   
  GPIO7 = 7,   
  GPIO8 = 8,   
  GPIO9 = 9,   
  GPIO10 = 10, 
  GPIO11 = 11, 
  GPIO12 = 12, 
  GPIO13 = 13, 
  GPIO14 = 14, 
  GPIO15 = 15, 
  GPIO16 = 16, 
  GPIO17 = 17, 
  GPIO18 = 18, 
  Y2_HS = 19   
};
 
enum class MemStorage : uint8_t {
  Disabled = 0, 
  SPIFlash = 1, 
  I2CEEPROM = 2 
};
 
} // namespace bootcfg
 
namespace bootaddr {
constexpr uint32_t BASE = 0x00020000;
 
constexpr uint32_t LDO_CONFIG = BASE + 0x00;
 
constexpr uint32_t UART_ADDR = BASE + 0x02;
 
constexpr uint32_t RS485_DELAY = BASE + 0x04;
 
constexpr uint32_t COMM_CONFIG = BASE + 0x06;
 
constexpr uint32_t BOOT_CONFIG = BASE + 0x08;
 
constexpr uint32_t SPI_FLASH = BASE + 0x0A;
 
constexpr uint32_t I2C_CONFIG = BASE + 0x0C;
 
constexpr uint32_t GPIO_OUT = BASE + 0x0E;
 
constexpr uint32_t GPIO_DIR = BASE + 0x10;
 
constexpr uint32_t GPIO_PU = BASE + 0x12;
 
constexpr uint32_t GPIO_PD = BASE + 0x14;
 
constexpr uint32_t GPIO_EXT = BASE + 0x16;
 
constexpr uint32_t CLOCK_CONFIG = BASE + 0x18;
 
constexpr uint32_t HALL_CONFIG = BASE + 0x20;
 
constexpr uint32_t ABN1_CONFIG = BASE + 0x20;
 
constexpr uint32_t ABN2_CONFIG = BASE + 0x22;
 
constexpr uint32_t REF_CONFIG = BASE + 0x22;
 
constexpr uint32_t STEPDIR_CONFIG = BASE + 0x22;
 
constexpr uint32_t SPI_ENC_CONFIG = BASE + 0x26;
 
constexpr uint32_t MECH_BRAKE_CONFIG = BASE + 0x24;
 
constexpr uint32_t BRAKECHOPPER_CONFIG = BASE + 0x24;
 
constexpr uint32_t MEM_STORAGE_CONFIG = BASE + 0x28;
} // namespace bootaddr
 
struct LDOConfig {
  bootcfg::LDOVoltage vext1{bootcfg::LDOVoltage::Disabled};   
  bootcfg::LDOVoltage vext2{bootcfg::LDOVoltage::Disabled};   
  bootcfg::LDOSlope slope_vext1{bootcfg::LDOSlope::Slope3ms}; 
  bootcfg::LDOSlope slope_vext2{bootcfg::LDOSlope::Slope3ms}; 
  bool ldo_short_fault{false}; 
};
 
struct BootConfig {
  bootcfg::BootMode boot_mode{
      bootcfg::BootMode::Parameter}; 
  bool bl_ready_fault{false};        
  bool bl_exit_fault{true};          
  bool disable_selftest{false};      
  bool bl_config_fault{false};       
  bool start_motor_control{false};   
};
 
struct UARTConfig {
  uint8_t device_address{1};                            
  uint8_t host_address{255};                            
  bool disable_uart{false};                             
  bootcfg::UartRxPin rx_pin{bootcfg::UartRxPin::GPIO7}; 
  bootcfg::UartTxPin tx_pin{bootcfg::UartTxPin::GPIO6}; 
  bootcfg::BaudRate baud_rate{bootcfg::BaudRate::BR115200}; 
};
 
struct RS485Config {
  bool enable_rs485{false}; 
  bootcfg::RS485TxEnPin txen_pin{
      bootcfg::RS485TxEnPin::None}; 
  uint8_t txen_pre_delay{0};        
  uint8_t txen_post_delay{0};       
};
 
struct SPIBootConfig {
  bool disable_spi{false};                                           
  bootcfg::SPIInterface boot_spi_iface{bootcfg::SPIInterface::SPI0}; 
  bootcfg::SPI0SckPin spi0_sck_pin{bootcfg::SPI0SckPin::GPIO11};     
};
 
struct SPIFlashConfig {
  bool enable_flash{false}; 
  bootcfg::SPIInterface flash_spi_iface{bootcfg::SPIInterface::SPI1}; 
  bootcfg::SPI0SckPin spi0_sck_pin{bootcfg::SPI0SckPin::GPIO6};       
  uint8_t cs_pin{0};                                                  
  bootcfg::SPIFlashFreq freq_div{bootcfg::SPIFlashFreq::Div4}; 
};
 
struct I2CConfig {
  bool enable_eeprom{false};                              
  bootcfg::I2CSdaPin sda_pin{bootcfg::I2CSdaPin::GPIO5};  
  bootcfg::I2CSclPin scl_pin{bootcfg::I2CSclPin::GPIO4};  
  uint8_t address_bits{0};                                
  bootcfg::I2CFreq freq_code{bootcfg::I2CFreq::Freq100k}; 
};
 
struct ClockConfig {
  bootcfg::ClockSource use_external{
      bootcfg::ClockSource::Internal}; 
  bootcfg::ExtSourceType ext_source_type{
      bootcfg::ExtSourceType::Oscillator}; 
  bootcfg::XtalDrive xtal_drive{bootcfg::XtalDrive::Freq16MHz}; 
  bool xtal_boost{false};                                       
  bootcfg::SysClkSource pll_selection{
      bootcfg::SysClkSource::PLL};                         
  uint8_t rdiv{14};                                        
  bootcfg::SysClkDiv sysclk_div{bootcfg::SysClkDiv::Div1}; 
};
 
struct GPIOConfig {
  uint16_t outputMask_0_15{0};    
  uint8_t outputMask_16_18{0};    
  uint16_t directionMask_0_15{0}; 
  uint8_t directionMask_16_18{0}; 
  uint16_t pullUpMask_0_15{0};    
  uint8_t pullUpMask_16_18{0};    
  uint16_t pullDownMask_0_15{0};  
  uint8_t pullDownMask_16_18{0};  
  uint8_t analogMask_2_5{0};      
};
 
struct HallConfig {
  bool enable{false};
  bootcfg::HallUPin u_pin{bootcfg::HallUPin::GPIO2};
  bootcfg::HallVPin v_pin{bootcfg::HallVPin::GPIO3};
  bootcfg::HallWPin w_pin{bootcfg::HallWPin::GPIO4};
};
 
struct ABN1Config {
  bool enable{false};
  bootcfg::ABN1APin a_pin{bootcfg::ABN1APin::GPIO5};
  bootcfg::ABN1BPin b_pin{bootcfg::ABN1BPin::GPIO1};
  bootcfg::ABN1NPin n_pin{bootcfg::ABN1NPin::Disabled};
};
 
struct ABN2Config {
  bool enable{false};
  bootcfg::ABN2APin a_pin{bootcfg::ABN2APin::GPIO6};
  bootcfg::ABN2BPin b_pin{bootcfg::ABN2BPin::GPIO7};
};
 
struct RefConfig {
  bootcfg::RefLPin ref_l_pin{bootcfg::RefLPin::Disabled};
  bootcfg::RefRPin ref_r_pin{bootcfg::RefRPin::Disabled};
  bootcfg::RefHPin ref_h_pin{bootcfg::RefHPin::Disabled};
};
 
struct StepDirConfig {
  bool enable{false};
  bootcfg::StepPin step_pin{bootcfg::StepPin::GPIO7};
  bootcfg::DirPin dir_pin{bootcfg::DirPin::GPIO6};
};
 
struct SPIEncConfig {
  bool enable{false};
  bootcfg::SPIEncBlock spi_block{bootcfg::SPIEncBlock::SPI0};
  bootcfg::SPIEncMode spi_mode{bootcfg::SPIEncMode::Mode0};
  bootcfg::SPIEncFreq spi_freq{bootcfg::SPIEncFreq::Div4};
  bootcfg::SPIEncCSPin cs_pin{bootcfg::SPIEncCSPin::GPIO8};
  bootcfg::SPIEncCSPol cs_polarity{bootcfg::SPIEncCSPol::ActiveLow};
};
 
struct MechBrakeConfig {
  bool enable{false};
  bootcfg::MechBrakeOutput output_pin{bootcfg::MechBrakeOutput::GPIO8};
};
 
struct BrakeChopperConfig {
  bool enable{false};
  bootcfg::BrakeChopperOutput output_pin{bootcfg::BrakeChopperOutput::GPIO0};
};
 
struct MemStorageConfig {
  bootcfg::MemStorage tmcl_script{bootcfg::MemStorage::Disabled};
  bootcfg::MemStorage parameters{bootcfg::MemStorage::Disabled};
};
 
struct BootloaderConfig {
  LDOConfig ldo;
  BootConfig boot;
  UARTConfig uart;
  RS485Config rs485;
  SPIBootConfig spiComm;
  SPIFlashConfig spiFlash;
  I2CConfig i2c;
  ClockConfig clock;
  GPIOConfig gpio;
  HallConfig hall;
  ABN1Config abn1;
  ABN2Config abn2;
  RefConfig ref;
  StepDirConfig stepDir;
  SPIEncConfig spiEnc;
  MechBrakeConfig mechBrake;
  BrakeChopperConfig brakeChopper;
  MemStorageConfig memStorage;
};
 
} // namespace tmc9660